I have the same problem here. My configuration:
- OS CentOS 6.4 64 bit, 8 GByte physical RAM
- 12.1sp1_243_modelsim_ase_linux
- 12.1sp1_243_quartus_free_linux
- Cyclone V: 5CGXBC4C6F23C7
I started with a very simple design (8 bit counter) just to learn the tool flow. I can compile this design with almost now warnings, but I cannot simulate it with ModelSim Altera Starter Edition.
When reading the Altera documentation my understanding was that I do not need any license file with modelSim Altera Starter Edition. Nevertheless I am asked for it when trying to start a RTL simulation. I tried to start the simulation by choosing
tools->run simulation tool->rtl simulation.
From the Altera documentation I learned that I need 64bit SW to compile a Cyclone V device; This seems to be true because I tried it with Windows 7 32bit and failed when the fitter tried to get more than 2 GByte of RAM. On the other hand I learned from Altera documentation that ModelSim is 32 bit only. May this be the cause for my problem?
Does anybody managed to simulate a Cyclone V device with these SW versions?
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