I am using Quartus Prime Lite v18.1 and targeting the MAX 10 10m16scu169a7g in my project which uses the UFM IP. For ModelSim simulation I am having a problem/questions in initializing the UFM.

Hi Vikas,

Thanks for responding. However I am not using Nios for this project nor am I doing reconfiguration as this video focuses on.

I am more concerned with the ability to simulate a project showing activity of the UFM signals especially its avmm_readdata output

as the address increments along with the proper control signals. Except for the avmm_readdata output always being shown as xFFFFFFFF

the other signals seem correct to me in ModelSim. I believe that the UFM using the Platform Designer (QSYS) was implemented correctly.

If there was an example for ModelSim simulation available for me to follow it would be helpful but I have not found any. I did find an project example

using the Signal Tap Analyzer with documented waveforms that should run on the MAX 10 FPGA Development kit. We just ordered this kit so I hope to soon excersize this example while learning the Signal Tap Analyzer.

It would have been so much easier to just simulate with ModelSim which I could immediately do since I am familiar with this tool.