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- KeenYewL_Intel
Contributor
Hi there, you have come to Intel FPGA forum, I'm afraid we do not have the expertise to help you with ISE design suite. I would hereby close this thread.
Design an 8-bit register (PC):
* when its "Increment" input is activated, it adds 1 to its content.
* when its "Load” input is activated, it stores the data given from 8-bit input of "Address".
* it gives its content to the 8-bit output of "PcOutput" directly.
Hi there, you have come to Intel FPGA forum, I'm afraid we do not have the expertise to help you with ISE design suite. I would hereby close this thread.