Forum Discussion
AVanB3
Occasional Contributor
6 years agoI am almost certain that my Quartus II web 13.1 program creates RTL schematics with errors in them. (I have not upgraded the installation afterwards because my computer is offline!).
Please see next screencopy that shows the wrong 2'h1 and 2'h2 markings (they should be exchange) in the Mux4to1 example. Also the RTL schematic of the 4to2 Mux makes no sense to me. Can you please ex...
AVanB3
Occasional Contributor
6 years agoUnderstood KhaiY. But since the current file worked in Xilinx without the BRAM_16x1S file, it wasn't needed and therefore not given in the mentioned book. And if I had that file I wouldn't know how to add it to the project anyhow. Especially if it can't be added to the existing vhdl file. I already tried to do that previously to get it compiled in Quartus until I found out that it already worked in its present version in Xilinx ISE 14.6.
Thanks.
Best regards.
Albert.