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AVanB3's avatar
AVanB3
Icon for Occasional Contributor rankOccasional Contributor
6 years ago

I am almost certain that my Quartus II web 13.1 program creates RTL schematics with errors in them. (I have not upgraded the installation afterwards because my computer is offline!).

Please see next screencopy that shows the wrong 2'h1 and 2'h2 markings (they should be exchange) in the Mux4to1 example. Also the RTL schematic of the 4to2 Mux makes no sense to me. Can you please ex...
KhaiChein_Y_Intel's avatar
KhaiChein_Y_Intel
Icon for Regular Contributor rankRegular Contributor
6 years ago

Hi Albert,

I appreciate your explanation on the issue, but unfortunately we are not in liberty to discuss on our FPGA software especially in comparison to our competitor products.

I am happy to address the implementation challenges that is related to our FPGA software. In general, all the source files need to be added to the project directory for successful compilation. In this case, the software reports that the source file for BRAM_16x1S is missing in the project directory. You have to add the source file for this BRAM_16x1S if you want to instantiate it in the bram_16x2.vhd file.

Thanks.

Best regards,

KhaiY