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AVanB3's avatar
AVanB3
Icon for Occasional Contributor rankOccasional Contributor
6 years ago

I am almost certain that my Quartus II web 13.1 program creates RTL schematics with errors in them. (I have not upgraded the installation afterwards because my computer is offline!).

Please see next screencopy that shows the wrong 2'h1 and 2'h2 markings (they should be exchange) in the Mux4to1 example. Also the RTL schematic of the 4to2 Mux makes no sense to me. Can you please ex...
KhaiChein_Y_Intel's avatar
KhaiChein_Y_Intel
Icon for Regular Contributor rankRegular Contributor
6 years ago

Hi,

Do you still see the error below? If yes, can you provide the design.qar for investigation?

Error (12006): Node instance "U0" instantiates undefined entity "BRAM_16x1S"

Error (12006): Node instance "U1" instantiates undefined entity "BRAM_16x1S"

For the new question on simulation: It apparently doesn't automatically use the simulation testfile that was made for a 4 to 1 Mux and its already in the VHDL file put in In- and output declarations and the to simulate input data. can you open a new forum post to make sure that there is only one question in one post? This helps to reduce confusion to the other users who have the same error and helps them to find the solution to each of the error/question easily.

Thanks.

Best regards,

KhaiY