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AVanB3's avatar
AVanB3
Icon for Occasional Contributor rankOccasional Contributor
6 years ago

I am almost certain that my Quartus II web 13.1 program creates RTL schematics with errors in them. (I have not upgraded the installation afterwards because my computer is offline!).

Please see next screencopy that shows the wrong 2'h1 and 2'h2 markings (they should be exchange) in the Mux4to1 example. Also the RTL schematic of the 4to2 Mux makes no sense to me. Can you please ex...
KhaiChein_Y_Intel's avatar
KhaiChein_Y_Intel
Icon for Regular Contributor rankRegular Contributor
6 years ago

Hi,

Could you provide the design.qar for investigation? I can help to test on my side.

Thanks.

Best regards,

KhaiY

  • AVanB3's avatar
    AVanB3
    Icon for Occasional Contributor rankOccasional Contributor
    6 years ago
    Hi KhaiY, answering on the Intel forum was strangely rejected why I hope I am able to reply by email instead? I am only a beginner in VHDL so I am not sure how to obtain the asked for .qar file in Quartus. I hope my hereby attached text rapport and Post mapping screencopy are helping to solve the question. Thanks again!, Albert.
  • AVanB3's avatar
    AVanB3
    Icon for Occasional Contributor rankOccasional Contributor
    6 years ago

    Okay. Hereby I'll try to attach that qar file. If nothing is wrong in my RTL viewer, I like to understand what those 16'hex numbers represent. I suppose that I need to limit the possible terms in Karnaugh to get those results?