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james57
Icon for Occasional Contributor rankOccasional Contributor
2 years ago

HPS -> FPGA Throughtput Experiment

Hi all, I am attempting an experiment to calculate the throughput of the HPS -> FPGA Bridge and the Visa-versa on the Stratix 10. I decided that I would use a FIFO in Quartus Platform Designer to ac...
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james57's avatar
james57
Icon for Occasional Contributor rankOccasional Contributor
2 years ago

Hi @EBERLAZARE_I_Intel

I have looked through the documentation and am unable to find a solid number.

Could an estimation of the throughput for the HPS <-> FPGA bridge and F->S bridge be made?

I have been able to calculate from a design but am unsure if I am correct.

Thanks,

James