Forum Discussion
OKris1
New Contributor
6 years agoHi Anand
My custom VHDL code is a basic 2's complement calculator (which for the moment only do multiplication)
It has AVALON MM slave interface with 3 registers which are two for input value and one output register for multiplication result
When I set a generic value called base_address the first register is given this address, and the second is given base_address+1 and the next one is given base_address+2
I am ot sure if I understand the base column in QSYS system contents tab, but I thought this was the same thing = base_address?
When I use Assign Base address from system menu all my QSYS components are given a sequenctially logic address span that do not conflict, but I dont understand how my CUSTOM MADE qsys COMPONENT addressable registers are related to the BASE value in QSYS system contents?
Br
Øystein
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Fra: "Intel Forums" <supportreplies@intel.com>
Til: "oystein.kristiansen@embida.no" <oystein.kristiansen@embida.no>
Sendt: 29.05.2019 04.15.07
Emne: AnandRS answered you: How to set QSYS component base address through VHDL generics
AnandRaj_S_Intel
Regular Contributor
6 years ago
NO,
Let me explain with example:
- Let us say we have a 2 custom component namely A & B.
- The Qsys system assign the base address & address span for the component.(A=0x0000 b =0x000F) base of A=0x0000 b=0x000F and address span for component A=0x000 to 0x000E.
- In component A hdl we have a case statement when "01" => Z <= X; 01 is address =offset address.Now data is stored in base address of the component + offset address =0x0001.
To have better understanding go through course like Using the Nios II Processor: Hardware Development,Using the Nios II Processor: Software Development & Using the Nios II Processor: Custom Components and Instructions
https://www.intel.com/content/www/us/en/programmable/support/training/catalog.html
Regards
ANAND