Forum Discussion
ldm_as
Occasional Contributor
6 years agoHow to select between the BRAM and Distributed Logic implementation?
Hi All, The Quartus has the RTL code Templates for implementation of the Simple and True Dual Port RAMs. But, how could I guide the tool which implementation of the BRAM I would prefer - Distribut...
KennyT_altera
Super Contributor
6 years agoHere is the full steps:
1) open the .v files
2) rigth click on the .v files -> insert template
3) Verilog HDL -> Synthesis attribute -> ramstyle attribute
You will see the example there, u can try use bram to see if it works.
Let me know if this helps?