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ldm_as's avatar
ldm_as
Icon for Occasional Contributor rankOccasional Contributor
5 years ago

How to select between the BRAM and Distributed Logic implementation?

Hi All, The Quartus has the RTL code Templates for implementation of the Simple and True Dual Port RAMs. But, how could I guide the tool which implementation of the BRAM I would prefer - Distribut...
KennyT_altera's avatar
KennyT_altera
Icon for Super Contributor rankSuper Contributor
5 years ago

Here is the full steps:

1) open the .v files

2) rigth click on the .v files -> insert template

3) Verilog HDL -> Synthesis attribute -> ramstyle attribute

You will see the example there, u can try use bram to see if it works.

Let me know if this helps?