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Altera_Forum's avatar
Altera_Forum
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12 years ago

How to run VHDL code on Altera DE2?

Hello! I am newbie in FPGA, but all last mounth I try understand how it works :) I am create some simple projects like calculator or binary clock on Altera DE2 by whatching some video lessons. And now i want to run on Altera DE2 some hash function algorythm. I am understand how it works as programming algorythm, but I can't understand how to run it on this board. VHDL code of this algorythm I download from this (keccak.noekeon.org / KeccakVHDL-3.1.zip).

I am create a new project in Quartus II and add in it VHDL files. Compilation was successful, but it's not working on board. I think it's because of I am not write pins on Assignment Editor in Quartus II and Quartus compile this code with random pins. (But I am not understand about it). But after reading Altera DE2 User Manual I am can't understand how work with memory on this board.

So, may be can help me create working Quartus II project with this algorythm?

2 Replies

  • Altera_Forum's avatar
    Altera_Forum
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    12 years ago

    Hi,

    first you need to understand what are the inputs and outputs that the board has and what are the inputs and outputs the algorithm module has.

    From a quick look, the algorithm module takes a clock, a start and done signal and a 64x64 bit memory input interface and a 64x64 bit memory output interface.

    Of course, there's nothing on the board that can actually interface with this directly.

    So, you'll need to create a VHDL module where you instantiate the algorithm module, along with some kind of interface to the board's hardware.

    One quick way you can get it working in simulation:

    Create a module when you instantiate the algorithm module plus 2 64x64 altsyncsram modules (from the MegaWizard).

    One of the memory modules will be your input, the other the output.

    Create and set a .hex file on the input memory block with some data.

    Then give the design a "start" pulse and see that it writes the output on the output memory block.

    Once you have this working on simulation, you can make it work on hardware.

    - Assign the clock, reset, start and done signals.

    - Enable the In-System memory editor, this will allow you to write and read the contents of the memory blocks through the JTAG interface.
  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    12 years ago

    Polikin,

    I am new to Altera FPGA too. But attach a extract of document that helped me get started. If you get more detail about the DE2 I might be able to help you.

    I hope this will help you.