Forum Discussion
TuckerZ
Occasional Contributor
Occasional ContributorHow to instantiate components of Cyclone V IOE for design.
Hello, I am trying to instantiate the DDR and read FIFO items that are integrated into the Cyclone V I/O elements (IOEs). I know you can instantiate DDR registers using the ALTDDIO IP. However, I h...
Structures like that are usually added as needed based on the design. If you add a FIFO IP and connect it to an I/O or use an IP that has a parameter for using the FIFO, the synthesized design would make use of that hardware. There's no specific IP as far as I know to implement that particular FIFO.
sstrell
Super Contributor
Super ContributorDon't know. Like I said, it's possible a particular IP might have an option you could set to enable its use, but the whole point of a place and route engine is to automatically choose the resources needed to implement a design.
TuckerZOccasional Contributor
Occasional ContributorPerhaps someone at Intel can shed some more light on this.
