Forum Discussion

MoZdk's avatar
MoZdk
Icon for Occasional Contributor rankOccasional Contributor
4 years ago
Solved

How to ignore simulation only ports when mapping to FPGA pins?

A design has a number of simulation ports that should not be tied to FPGA pins. A VHDL example is shown in the source below, where the sim_only_* ports are for simulation only, thus should not be ...
  • sstrell's avatar
    sstrell
    4 years ago

    Use Virtual Pin assignments in the Assignment Editor. That way the logic for the pins will still be implemented but they won't get connected to physical I/O.

RichardT_altera's avatar
RichardT_altera
Icon for Super Contributor rankSuper Contributor
4 years ago

Hi @MoZdk

I’m glad that your question has been addressed, I now transition this thread to community support. If you have a new question, feel free to open a new thread to get the support from Intel experts. Otherwise, the community users will continue to help you on this thread. Thank you.

Best Regards,
Richard Tan

p/s: If any answer from the community or Intel support are helpful, please feel free to give Kudos.