Forum Discussion
GerhardCadek
Occasional Contributor
9 months agoHow-to generate dual-port (read/write) RAM with clock enables
Following Stratix® 10 Embedded Memory User Guide (2025.07.24) chapter 2.11.6 independent clock enables are supported for read/write clock mode input/output clock mode I start a "RAM 2-port" IP g...
RichardT_altera
Super Contributor
9 months agoYou can use below setting to enable the wrclocken and rdoutclocken.
- Use different clock enables for registers. (only available on Dual Clock: use separate "read" and "write" clocks)
- Use clock enable for write input registers.
- Use clock enable for output registers.
Regards,
Richard Tan
GerhardCadek
Occasional Contributor
9 months agoHi Richard,
thank you for this tipp. I will try this approach right next week!
Regards
Gerhard Cadek
- RichardT_altera8 months ago
Super Contributor
Any update on this?
Regards,
Richard Tan