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GerhardCadek's avatar
GerhardCadek
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3 months ago

How-to generate dual-port (read/write) RAM with clock enables

Following Stratix® 10 Embedded Memory User Guide (2025.07.24) chapter 2.11.6 independent clock enables are supported for read/write clock mode input/output clock mode I start a "RAM 2-port" IP g...
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RichardT_altera's avatar
RichardT_altera
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3 months ago

You can use below setting to enable the wrclocken and rdoutclocken.
- Use different clock enables for registers. (only available on Dual Clock: use separate "read" and "write" clocks)
- Use clock enable for write input registers.
- Use clock enable for output registers.

 

Regards,
Richard Tan

GerhardCadek's avatar
GerhardCadek
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3 months ago

Hi Richard,

thank you for this tipp. I will try this approach right next week!

Regards

Gerhard Cadek

  • RichardT_altera's avatar
    RichardT_altera
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    3 months ago

    Any update on this? 

    Regards,
    Richard Tan