How to find problem in design after compiliation / fitter failure

As a first, quite obvious answer, the estimation has been done for a different device. The final implementation is running short of DSP blocks, apparently consumes many ALMs to replace it.

Thanks for your reply. I doubt this is the case because the report is being created at the same time with the full flow compilation for the device (Terasic DE1-SoC). This is the device line from the report:

Target Family, Device, Board: Cyclone V, 5CSXFC6D6F31C8ES, de1soc:de1soc_sharedonly

; Family                          ; Cyclone V                                       ;
; Device                          ; 5CSEMA5F31C6                                    ;

Isn't it possible to make the report for the same device that is used in the compilation?

I wish it was, but how? I am not doing anything to change the board myself, so how can I make it for the same device? This is the command I use for compilation:

aoc -o t_device -v -I/x/inc -I/x/bin2 -I/y/intelFPGA/17.1/hld/include/kernel_headers -board=de1soc_sharedonly -profile -high-effort -fp-relaxed -fpc -seed=3 /x/device/device.cl

<?xml version="1.0"?>
<board version="14.1" name="de1soc_sharedonly">
  <compile project="top" revision="top" qsys_file="system.qsys" generic_kernel="0">
    <generate cmd="ip-generate --component-file=system.qsys --file-set=QUARTUS_SYNTH --output-directory=system/synthesis --report-file=qip:system/synthesis/system.qip --jvm-max-heap-size=3G"/>
    <synthesize cmd="quartus_sh --flow compile top -c top"/>
    <auto_migrate platform_type="c5soc" >
      <include fixes=""/>
      <exclude fixes=""/>
    </auto_migrate>
  </compile>
  
  <device device_model="5csxfc6d6f31c8es_dm.xml">
    <used_resources>
      <alms num="1080"/><!-- ALMs used for LUT logic + ALMs used for LUT logic and registers-->
      <ffs num="1908"/>
      <dsps num="0"/>
      <rams num="20"/>
    </used_resources>
  </device>
  <!-- One DDR3-800 DIMM, 256-bit data -->
	<global_mem max_bandwidth="6400">
		<interface name="acl_iface" port="kernel_mem0" type="slave" width="256" maxburst="16" latency="240" address="0x00000000" size="0x40000000"/>
	</global_mem>
	<host>
		<kernel_config start="0x00000000" size="0x0100000"/>
  </host>
  <interfaces>
		<interface name="acl_iface" port="kernel_cra" type="master" width="64" misc="0"/>
		<interface name="acl_iface" port="kernel_irq" type="irq" width="1"/>
		<kernel_clk_reset clk="acl_iface.kernel_clk" clk2x="acl_iface.kernel_clk2x" reset="acl_iface.kernel_reset"/>
	</interfaces>
</board>

Hmm, this seems very strange. Many people new to OpenCL on FPGAs use Terasic's low-cost Cyclone boards, someone should have seen this by now. I recommend bringing up the matter with Terasic's support.

Thanks, I will contact them and report back. If any ideas come up meanwhile, let me know.

It turns out that Terasic does not use the board_spec.xml file for generating their BSP, hence the wrong values. They instead modify the .dts file directly to generate the device tree / .dtb file. Unfortunately I could not get a reply on how to correctly set the parameters for the board_spec.xml file to make the HTML report more accurate. I am now using these values:

<!-- Device model for: 5CSEMA5F31C6 -->
<device_model version="0.9" target_model="cyclonev_tm.xml">
  <fmax expected="200" min="100" high="175"/>
  <resources>
    <alms num="32070"/>
    <ffs num="128280"/>
    <dsps num="87"/><!-- variable precision DSP blocks -->
    <rams num="3970"/><!-- M10Ks -->
  </resources>
</device_model>

  <device device_model="5csxfc6d6f31c8es_dm.xml">

  <device device_model="5csema5f31c6_dm.xml">