How to feed external clock generated by PLL into SOPC system?

Question

Dear everyone,

I am using Cyclone II ED board and Quartus II 9.0sp2. I am now building a multiple clock domain system using two FIR filters and one Dual-clock FIFO in SOPC Builder. Now I would like to provide them with two different external clock domains, which is to be generated by PLL.

The problem is: I don’t want to use the PLL in the SOPC Builder since it requires the master Avalon MM component such as the NIOS II processor. I am thinking if I can instantiate the PLL outside the SOPC Builder and then feed its clocks into the SOPC system?

If this is possible, can anyone please kindly tell me exact procedures to achieve this? I am actually new to SOPC Builder and not familiar with connecting the SOPC with external clock signals generated by PLL at all...

I really appreciate your kind help! Please don’t hesitate to ask for further clarification of my problem.

Thank you very much in advance!

Warmest regards

Sincerely

grit

altera_forum · Answer

Hi,

It's very easy. In SOPC interface, in the clock setting module, click "add". A new clock will appear in the clocks list, you can rename it and set the frequency. Then you can use it to clock your SOPC modules, setting it in the clock column.

Generating your SOPC system it will appear as an input pin of the top module.

Be aware to use your new clock to clock at least an SOPC module, or it will not appear as an input pin of your top module.

bye

altera_forum · Answer

In Quartus II go to the MegaWizard plug-in Manager (in Tools menu). Then click next, and in I/O folder you have the ALTPLL megafunction. Select the FPGA target and put the name of the pll block as it will appear in your project, click next, and then select the parameters of your PLL.

Once it is finished, you can add it to your design.

Jérôme

altera_forum · Answer

--- Quote Start ---

Hi,

It's very easy. In SOPC interface, in the clock setting module, click "add". A new clock will appear in the clocks list, you can rename it and set the frequency. Then you can use it to clock your SOPC modules, setting it in the clock column.

Generating your SOPC system it will appear as an input pin of the top module.

Be aware to use your new clock to clock at least an SOPC module, or it will not appear as an input pin of your top module.

bye

--- Quote End ---

Hi, thanks very much for reply.

Actually I know how to add new external clock inside SOPC builder; however, after the generation, how to interface the SOPC system with the PLL? Any suggestion?

Regards

grit

altera_forum · Answer

--- Quote Start ---

In Quartus II go to the MegaWizard plug-in Manager (in Tools menu). Then click next, and in I/O folder you have the ALTPLL megafunction. Select the FPGA target and put the name of the pll block as it will appear in your project, click next, and then select the parameters of your PLL.

Once it is finished, you can add it to your design.

Jérôme

--- Quote End ---

Hello, Jérôme,

I think you are getting what my problem is. But could you please give more details on how to add the PLL into my design after I have instantiated it using MegaWizard plug-in Manager? Thank you~!

Regards

grit

altera_forum · Answer

When you click on finish on the wizard, it is then asked to you if you want to add the Quartus II IP file to your project, answer yes. Then in your project you have a vhd or v file and a symbol file. If you use schematic, insert a symbol (Edit menu or icon) and on the libraries the symbol of your pll will appear, so just add it. Else if you use only vhd or v file, instantiate the pll as a classical component (look at the file inserted in your project for the entity). For example, without modifying the parameters you have something like that :  
ENTITY pll IS
    PORT
    (
        areset        : IN STD_LOGIC  := '0';
        inclk0        : IN STD_LOGIC  := '0';
        c0            : OUT STD_LOGIC ;
        locked        : OUT STD_LOGIC 
    );
END pll;

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How to feed external clock generated by PLL into SOPC system?

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