Forum Discussion
RichardT_altera
Super Contributor
1 year agoHi,
Dropping a note to ask if my last reply was helpful to you?
Do you need any further assistance from my side?
Regards,
Richard Tan
Amit4
New Contributor
1 year agoHi Richard,
Thank you for your reply. The issue is resolved now.
However, I have different problems related to implementing the jesd204 design example and doing FPGA implementation. I have generated the design example; for FPGA implementation, I am using Altera Apollo SOM board and AFE79xx EVM; I need help with the pin assignment, like how to check which pins to give for refclk_core and refclk_xcvr and mgmt_clk, etc.
Can you please help me with this?
Thank you
Regards