How to design divider circuit data path unit in Quartus II?

You can try to convert the HDL file to .bdf file. (only available in Quartus Standard/Lite, discontinued in Pro)

Once you have run "Analysis & Synthesis", click right the HDL file > Create Symbol Files for Current File.

I agreed with FvM, schematic can be visual friendly for smaller designs, but it comes with significant drawbacks as designs get more complex.

It is harder to manage large and complex circuits in schematic, it is not modular/parametrized (making design reuse challenging), and may not integrate well with other tools.

I know this is probably a one-time use for your assignment, but I recommend transitioning to a hardware description language such as Verilog or VHDL in future.

Regards,

Richard Tan