Forum Discussion
FvM
Super Contributor
1 year agoHi,
are you attending a "last century design methods" course? Schematic entry is legacy in Quartus, still supported but with shrinking functionality. If ever possible, I'd implement the divider in HDL. It can be still instantiated as schematic block if necessary.
What kind of divider are you designing? Fully parallel (like Quartus lpm_divide) or sequential (one or multiple result bits calculated per clock cycle)?
Regards
Frank