Forum Discussion
Hi,
Any reason why you put both paths in one constraint?
Did you try two separate constraint like so:
set_max_skew 1.0 -from [get_ports {PAD1}] \
-to [get_nets {A|clock_a}]]
set_max_skew 1.0 -from [get_ports {PAD2}] \
-to [get_nets {A|data_a}]]
Regards,
Nurina
Hi Nurina
Thank you, Nurina, very much.
The path1 is from PAD1 to clock_a of module A.
The path2 is from PAD2 to data_a of module A. The data_a is one bit data.
I hadn't tried to separate constraint. I will try it. And how to report the skew between those two paths?
I'm confused that separating the constraint can balance those two paths?
Those two paths aren't in the same group like data bus, data[7:0].
I'm confusing how to balance the delay of those two paths.
Thank you very much