How to change a library refence in modelsim?

Hi Johi,

"hi Johi,

Can you please check the each & every port & ports type of the component instance 'squarer' & corresponding entity?

Especially sclr port."

It was my previous post.

The issue is squaring operation cannot be used together with synchronous clear signal for LPM_MULT.

It should not be on port list.

Refer below code from FloatLn.vhd file & try to simulate, here port "sclr" is commented in COMPONENT & remove it from Entity as well if you can.

 COMPONENT  altsquare
	 GENERIC 
	 (
		DATA_WIDTH	:	NATURAL;
		PIPELINE	:	NATURAL;
		REPRESENTATION	:	STRING := "UNSIGNED";
		RESULT_ALIGNMENT	:	STRING := "LSB";
		RESULT_WIDTH	:	NATURAL;
		lpm_type	:	STRING := "altsquare"
	 );
	 PORT
	 ( 
		aclr	:	IN STD_LOGIC := '0';
		clock	:	IN STD_LOGIC := '1';
		data	:	IN STD_LOGIC_VECTOR(DATA_WIDTH-1 DOWNTO 0);
		ena	:	IN STD_LOGIC := '1';
		result	:	OUT STD_LOGIC_VECTOR(RESULT_WIDTH-1 DOWNTO 0)
		--sclr	:	IN STD_LOGIC := '0'
	 ); 
	 END COMPONENT;
 
 
 
squarer :  altsquare
	  GENERIC MAP (
		DATA_WIDTH => 13,
		PIPELINE => 1,
		REPRESENTATION => "UNSIGNED",
		RESULT_ALIGNMENT => "MSB",
		RESULT_WIDTH => 14
	  )
	  PORT MAP ( 
		aclr => aclr,
		clock => clock,
		data => squarerIn,
		ena => clk_en,
		result => wire_squarer_result
		  );

Let me know if this has helped resolve the issue you are facing or if you need any further assistance.

Best Regards

Vikas Jathar

(This message was posted on behalf of Intel Corporation)

Hello Vicky, Hello Abraham, Hello Tricky,

Thanks for your reactions: Your proposals are correct workarounds. However, every time this ALT_LOG is generated, manual correction will be necessary, so I share Abraham's conclusion.

As of Vicky's request/remark: I my initial request/detailed analysis referes to the fact that the "sclr" port was in some component definitions & some others it was not (be it all Altera lib or Altera IP code). That even within 1 lib directory, there are differences between component declarations & implementations. So I thought rechecking was not necessary, hence the misunderstanding.

But my inital queston remains still on the table: (I cannot help it :)): To do what is described in (be it an alternative solution for the issue or not) :

https://www.intel.com/content/www/us/en/programmable/quartushelp/13.1/mergedProjects/hdl/mega/mega_file_altsquare.htm

To perform functional and timing simulations, you must use the altera_mf.v library located in the <Quartus II installation directory>\eda\sim_lib directory. For VHDL, you must use the altera_mf.vhd library located in the <Quartus II installation directory>\eda\sim_lib directory. The VHDL component declaration file is located in the altera_mf_components.vhd library in the <Quartus II installation directory>\eda\sim_lib directory.

How do you do this ?

I select the altera_mf.vhd in Modelsim after launching it via Quartus. I click right, then I select "Edit Library Mapping", then "Browse", then I select a directory "C:/intelFpga_lite/17.1/quartus/eda/sim_lib."

The result is: altera_mf (unavailable) in the Library window?

So indeed I have a workaround, but I still wonder how does one do what is specified in the Intel/Altera web page?

Do you need to change the complete list of lib references or only reference?

Best regards,

Johi.