Forum Discussion
sstrell
Super Contributor
6 years agoI'm not sure why you're using both a schematic and HDL code. From the code images, the ENTRADA and SAIDA signals are the I/O of an instantiated block. Is the code you are showing your top-level design and you've instantiated the schematic design in it? If so, yes, you would need to define ENTRADA and SAIDA with wire data types. Can you post more code, like the top-level design?
In any event, use the Pin Planner from the Assignments menu to make pin assignments.
And you mention an error but you don't mention what the error is. I think a little more detail is required here.
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