PRiva1
New Contributor
6 years agoHow do you access live data from an Altera MAX 10 FPGA's built in ADC as a block diagram within Quartus?
Hi, I have an Altera MAX 10 FPGA and am trying to use the built in adc. More specifically, I have an analog signal connected to the ADC1IN6 input. I followed video tutorials which show the Altera ADC Core with PLL combination in order to create an instance of an ADC. Unfortunately, I can't seem to understand how to get the live 12-bit digital data of the analog signal. How can I access these bits using a block diagram for example? Do I need to send a specific command to the ADC in order to start reading data? I am very new to FPGA design and the Quartus software, so the more specific the answer, the better.
Thank you for your time.