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PRiva1's avatar
PRiva1
Icon for New Contributor rankNew Contributor
6 years ago

How do you access live data from an Altera MAX 10 FPGA's built in ADC as a block diagram within Quartus?

Hi, I have an Altera MAX 10 FPGA and am trying to use the built in adc. More specifically, I have an analog signal connected to the ADC1IN6 input. I followed video tutorials which show the Altera ADC...
PRiva1's avatar
PRiva1
Icon for New Contributor rankNew Contributor
6 years ago

Thanks so much for the response.

I have looked at that video and am very confused by it because it says to code a sequencer block at 3:59, but I'm assuming I should be able to get the ADC up and running without doing this?

This is where I am at:

I've verified that my ADC works because I've attached my .sof file to the System Console - ADC Toolkit (Beta) 0 and I can see the Oscilloscope react to my analog signal changes. Now I want to take that ADC and use it in a simple block diagram attached to some LEDs (or find a way to test it using signal tap). In QSYS, I expect that I should export "response" as this is where my data is located? I seem to get no data in this response though.

My ADC works perfectly in the System Console, how can I just get this data as 12 wires in a block diagram?

AnandRaj_S_Intel's avatar
AnandRaj_S_Intel
Icon for Regular Contributor rankRegular Contributor
6 years ago

​Hi,

Sorry for the delay,

You can access 12-bit ADC data with help of NIos II and PIO IP's with software help.

With the help of Niso ii you can read the ADC data and put it on to PIO.

When you create the system with above IP's you can see the bdf with 12-bit data out.

Refer below link for the example.

https://fpgacloud.intel.com/devstore/platform/16.0.0/Standard/adc-data-capture-with-nios-ii-processor/

Let me know if this has helped resolve the issue you are facing or if you need any further assistance.

Regards

Anand