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BHunt11's avatar
BHunt11
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5 years ago

How do I report powered-down transceivers and PLLs in Quartus Prime Standard?

I have an issue which looks like an xcvr_fpll_a10_0 may not be powered or is shut down. How can I confirm that all the PLLs are in fact powered on in Quartus?
Deshi_Intel's avatar
Deshi_Intel
Icon for Regular Contributor rankRegular Contributor
5 years ago

HI,

Sorry, transceiver calibration is relying on clkusr as the clock source. We don't have alternate option to switch to FPGA internal clocking source.

I am afraid I need to request you to fix your board connection on clkusr pin connection.

Thanks.

Regards,

dlim

BHunt11's avatar
BHunt11
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5 years ago

Do the transceivers operate in any mode without the CLKUSR present? For example, can I put the PCS or PMA into loopback? That is, all RX receiver data is looped out the TX transmitter.

In this way, I could test the circuit in and out of the transceiver, before I fabricate new boards.

  • BHunt11's avatar
    BHunt11
    Icon for New Contributor rankNew Contributor
    5 years ago

    This is the looback mode I want to enable: Fig 236: Reverse Serial Loopback Path/Pre CDR, in UG-01143. May be called "diagnostic loopback".