How do I connect two vhdl files

Question

If I have two vhdl files for two blocks and I want to connect them to each other what do I do?

altera_forum · Answer

You can use a block diagram file to connect them visually...

In quartus, new file : block diagram file

You can also make a third VHDL file an with PORT MAP you can connect them...

But I am a beginner and I'm not sure...

altera_forum · Answer

thx for your reply I have to make sure because I'm short in time I saw they add a library file and use it in other files

altera_forum · Answer

you don't need a library, just a port map as themanman said.

see if this helps or come back and ask questions or search for VHDL port map. there should be many resources.

altera_forum · Answer

you dont even need a component decalration. Its alot safer to just use direct instantiation:

my_inst : entity work.my_ent --this is the direct instantiation part

port map (

);

Using this method, errors with the port map are picked up by the compiler instead of the simulator/synthesis (ie. you find errors alot quicker.)

altera_forum · Answer

thanks Tricky, i will try that method.

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