Forum Discussion
MuhammadAr_U_Intel
Contributor
7 years agoHi Rasul,
Yes this is expected, as explained earlier example design generate different file sets for Synthesis folder (qii/) and simulation folder (sim/)
Now I assume when you are saying that you modified the top level in quartus you updated the "ed_synth.v" to include your IP.
In order to add your IP's in example design simulation you need to update the files in simulation toplevel file "ed_sim.v" and update the simulation script as necessary to compile your IP files.
Hope this will help you to proceed.
Let me know if you have question.
Thanks
Arslan