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fengtianwenming's avatar
fengtianwenming
Icon for New Contributor rankNew Contributor
2 years ago

How can I convert a Verilog code file into a BDF file

I'm currently using Quartus 18.0. I've successfully written Verilog files that compile and simulate without any issues. However, I'm now seeking to generate BDF files directly from these Verilog code...
Hdl
SyafieqS's avatar
SyafieqS
Icon for Super Contributor rankSuper Contributor
2 years ago

As we do not receive any response from you on the previous question/reply/answer that we have provided. Please login to https://supporttickets.intel.com/, view details of the desire request, and post a feed/response within the next 15 days to allow me to continue to support you. After 15 days, this thread will be transitioned to community support. The community users will be able to help you on your follow-up questions.


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