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KOber
New Contributor
New ContributorHow can I change an I/O pin's pull_up value without re-synthesizing the design?
I need to change whether or not there are weak pull_ups on an FPGA's I/O pin but don't have the privilege of re-compiling the whole design. A new gateware file would need to be created, but since...
KOberNew Contributor
New ContributorShafiqY_Intel,
Can you put in an Arria 10 feature request for the ability to add pull ups to I/O without re-synthesizing the design, and provide me with the change request number?
Thank you
KOberNew Contributor
New ContributorShafiqY_Intel,
What is the Change Request Number for this feature request?
> Can you put in an Arria 10 feature request for the ability to add pull ups to I/O without re-synthesizing the design, and provide me with the change request number?
