Forum Discussion

Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
12 years ago

help with counter

im trying to learn to create counter that starts counting based on the input that from the expansion after i compile it it seems an error occur and i dont know how to solve it. help me guys.. this error occured (Error (10500): VHDL syntax error at ledwithcounter.vhd(29) near text "then"; expecting ":=", or "<=") ....here i attach my program.. help me guys..

Library IEEE;

use ieee.std_logic_1164.all;

use ieee.numeric_unsigned.all;

entity GPIOwithLED is

port( GPIO_0 : in std_logic_vector(1 downto 0);

ld_enb : in std_logic;--parallel load enable,active high

clk : in std_logic;-- system clock

cnt_enb : in std_logic;--count enable, active high

rst_n : in std_logic;-- reset,active high

q : out std_logic_vector(1 downto 0));

end GPIOwithLED ;

architecture bufferwithGpio_arc of GPIOwithLED is

begin

process(GPIO_0)

begin

if (GPIO_0(0)='1') then q<=GPIO_0(1 downto 0);

else q<= "00";

end if;

end process;

counter:process(clk,rst_n) is

begin

if ( rst_n='0' ) then

count <=(others=>'0');

else(clk'event and Clk ='1')then

if (ld_enb='1')then

count<=GPIO_0;

elsif(cnt_enb ='1')then

count <=count+1;

end if;

end if;

end process counter;

-- assigment ouput

q <= count;

end bufferwithGpio_arc;

14 Replies

  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor

    I don't know what your plans are but sounds ok to me to use a 50MHz clock and manual pushbutton reset as long as it is suitable to your case!! Try and learn. All of us play with code until it works. If it doesn't you are in trouble.

  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor

    Help with counter

    library ieee;

    use ieee.std_logic_1164.all;

    use ieee.numeric_std.all;

    use ieee.std_logic_unsigned.all;

    entity AcounterGpio2 is

    port( PIRin : in std_logic;

    clk : in std_logic;

    reset : in std_logic;

    PIRout : out std_logic;

    q : out std_logic);

    end AcounterGpio2 ;

    architecture bufferwithGpio_arc of AcounterGpio2 is

    signal cnt,enable: std_logic;

    begin

    process(PIRin)

    begin

    if PIRin = '1' then

    PIRout <= PIRin ;

    else PIRout <= '0';

    end if;

    end process;

    counter:process (clk)

    enable <= PIRout;

    begin

    if (rising_edge(clk)) then

    if reset = '1' then

    cnt := 0;-- Reset the counter to 0

    elsif enable = '1' then

    cnt := cnt + 1;-- Increment the counter if counting is enabled

    end if;

    end if;

    -- Output the current count

    end process counter;

    q <= cnt;

    end bufferwithGpio_arc;

    error Error (10500): VHDL syntax error at AcounterGpio2.vhd(29) near text "enable"; expecting "begin", or a declaration statement keep showing up.. what should i do and how do i declare the output from PIRout that will be the input for my counter.
  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor

    First get rid of the ieee.std_logic_unsigned.all; and use unsigned and signed types, as suggested before. Second you can to signal assignments just after the process line. it needs to be after the "begin".