help with counter

Help with counter

library ieee;

use ieee.std_logic_1164.all;

use ieee.numeric_std.all;

use ieee.std_logic_unsigned.all;

entity AcounterGpio2 is

port( PIRin : in std_logic;

clk : in std_logic;

reset : in std_logic;

PIRout : out std_logic;

q : out std_logic);

end AcounterGpio2 ;

architecture bufferwithGpio_arc of AcounterGpio2 is

signal cnt,enable: std_logic;

begin

process(PIRin)

begin

if PIRin = '1' then

PIRout <= PIRin ;

else PIRout <= '0';

end if;

end process;

counter:process (clk)

enable <= PIRout;

begin

if (rising_edge(clk)) then

if reset = '1' then

cnt := 0;-- Reset the counter to 0

elsif enable = '1' then

cnt := cnt + 1;-- Increment the counter if counting is enabled

end if;

end if;

-- Output the current count

end process counter;

q <= cnt;

end bufferwithGpio_arc;

error Error (10500): VHDL syntax error at AcounterGpio2.vhd(29) near text "enable"; expecting "begin", or a declaration statement keep showing up.. what should i do and how do i declare the output from PIRout that will be the input for my counter.