Forum Discussion
esantana
New Contributor
New ContributorGND connection restriction between Logic Lock regions
Hello, I am trying to realise a design with 3 logic regions (using logic lock). All of them are reserved regions (no connections between them). However, it is a conection outside the regions. It i...
KennyT_altera
Super Contributor
Super ContributorHi,
Can you attached your design so that I can take a look into the issues?
If you think you need to send to Intel privately, do let me know.
Thansk,
Best regards,
Kenny Tan
