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esantana's avatar
esantana
Icon for New Contributor rankNew Contributor
1 year ago

GND connection restriction between Logic Lock regions

Hello, I am trying to realise a design with 3 logic regions (using logic lock). All of them are reserved regions (no connections between them). However, it is a conection outside the regions. It i...
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sstrell's avatar
sstrell
Icon for Super Contributor rankSuper Contributor
1 year ago

Can you show some code that shows this implementation? Logic 0 does not need to route to a specific location on the device unless you've added some code that would define it. You say "GND" is not defined as a signal, but the Chip Planner screenshot you show says otherwise unless there is some other logic you've defined that is causing this issue.