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Albert_Waissman's avatar
Albert_Waissman
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1 year ago

Generated simulation model for intel_agilex_hps do not provide implementation for f2h_ace interface

Hello, I found that generated simulation mode by design platform for HPS do not provide implementation for this interface. This interface get passed all the way to: my_hps.intel_agilex_hps_0.intel...
Simulation
awaissman's avatar
awaissman
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1 year ago

Not sure if this is the issue even seems so.

As i mention ace interface from top gets to fpga_interfaces module and there it's not connected to any where.

Beside this i did not saw any Error for missing interconnect as it mentioned in this issue.

I am going to look for the error first.

Thanks for following up.