Hello&#65306; When I run my FPGA(OpenCL) code in emulator mode, the result is right; but after I create hardware configuration file and run on the FPGA, the code is blocked and can't finish.My code used channel.What is the problem?How to debug the code in this situation?Thank you very much!

1) Is there any error output? 2) What hardware are you using? 3) Did you use a reference design?

This is a very normal and recurring situation; Altera's emulator has a lot of limitations, first and foremost the fact that it doesn't emulate concurrency/parallelism. When channels are used, it is very likely that if you are not careful enough, your code will block on the FPGA even though it works fine on the emulator. Debugging the code in this situation is not easy. You can try these steps to see if you can find the problem: 1- Add some counters to your code in the emulator and make sure you are writing the same number of values to every channel, that you are reading from it. 2- Pay attention to the "order" of your channels, try to think of situations that if the channels are reordered, your code may block. It is very likely that this is your problem since the compiler does NOT guarantee channel ordering. Carefully read the "Programming Guide > 1.6.4.5.7 Enforcing the Order of Channel Calls" and try using "mem_fence(CLK_CHANNEL_MEM_FENCE)" to force the order of your channels and see if it fixes the issue. 3- Increasing the depth of channels might help. 4- You can add printf to your OpenCL kernel and run it on the FPGA; even though it will heavily slow down the kernel, it might help you find the channel that is blocking the execution. Try to use a light printf (avoid printing values from the kernel, just print a fixed text to see where it is blocking) to avoid new dependencies.

Thanks for your reply! I want to printf some informations, but the informations are not display.Do you know why?Does it means my code did not reach there before blocked?

Thank you for reply! 1)There is no erroroutput. 2)Xeon + Arria10 3)I refer to Altera's channel exampls! Do you know any method to debug the code?

FPGA(Opencl) code work well in emulator mode, but can't finish run on the FPGA

23 Replies

Altera_Forum
Honored Contributor
8 years ago
--- Quote Start ---
Easiest solution is to put all of your code in one kernel, remove all the channels, and use local memory buffers instead.
--- Quote End ---

Now I have remove all the channels and use local memory buffers instead， the same as you say. But after I finish debug this version, I also want to try use channels, to see if use channels can increace performance. Is it necessary to do that I think?
Altera_Forum
Honored Contributor
8 years ago
--- Quote Start ---
Now I have remove all the channels and use local memory buffers instead， the same as you say. But after I finish debug this version, I also want to try use channels, to see if use channels can increace performance. Is it necessary to do that I think?
--- Quote End ---

You can try but based on my experience, channels not only don't increase performance, they also increase area usage considerably.
Altera_Forum
Honored Contributor
7 years ago
--- Quote Start ---
Now I have remove all the channels and use local memory buffers instead， the same as you say. But after I finish debug this version, I also want to try use channels, to see if use channels can increace performance. Is it necessary to do that I think?
--- Quote End ---

Hello,

I was wondering, whether you were successful in running the kernel in channel configuration,
I would like to follow your work, please keep us posted.

Thanks

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FPGA(Opencl) code work well in emulator mode, but can't finish run on the FPGA

23 Replies

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