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scong4
Occasional Contributor
Occasional ContributorFitter Error with Quartus Prime 18.0 for HPS_CLK1
I use HPS_CLK1 as system clock , but can't assign it . Here is the error message and my design. ============================================= Error(14566): The Fitter cannot place 2 periphery comp...
KhaiChein_Y_Intel
Regular Contributor
Regular ContributorHi,
According to the User Guide, output clocks from HPS are not intended to be fed into PLLs in the FPGA. Therefore, you cannot use the HPS clock to generate a clock.
Source: https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/an/an763-a10-soc-device-design-guidelines.pdf
Thanks.
Best regards,
KhaiY
