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saasha's avatar
saasha
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3 months ago

FIR IP configured for Interpolation

Why does my Altera FIR IP, configured for interpolation by 80, produce the expected outputs when I provide 3 input samples, but fail to produce the expected behavior when I provide 10 input samples? ...
Compilation
Hdl
Simulation
saasha's avatar
saasha
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2 months ago

Hi Jeffc,

I had tried this one, this was giving expected number of outputs.

JeffC_Altera's avatar
JeffC_Altera
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2 months ago

To be clear - does this allow you to move forward right now?  The functionality of "tready" is only a pass-through of the tready on the source side (input).  Per the documentation, it's not a function of the current status of the internal FIR.  So, you need to create your signaling to match the system behavior, which is what I articulated in the drawing.  If you are seeing bursts of data coming in, you might need to add a simple FIFO/buffer that pulls data out at the 1-in-80 and absorbs bursts on the write side (not to exceed a net rate of 1-in-80, of course).