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saasha's avatar
saasha
Icon for New Contributor rankNew Contributor
3 months ago

FIR IP configured for Interpolation

Why does my Altera FIR IP, configured for interpolation by 80, produce the expected outputs when I provide 3 input samples, but fail to produce the expected behavior when I provide 10 input samples? ...
Compilation
Hdl
Simulation
saasha's avatar
saasha
Icon for New Contributor rankNew Contributor
3 months ago

I am using Quartus prime lite 25.1 version.
But I was not able to see tready go low. I even tried providing inputs to the FIR once every 80 clock cycles.

CheepinC_altera's avatar
CheepinC_altera
Icon for Regular Contributor rankRegular Contributor
3 months ago

saasha Would you mind to help to create a simple testbench design in QuestaSim that reproduces the issue you’re observing? Having a minimal simulation case would greatly help with replication and debugging on our side.

 

It would also be helpful if you could share the step-by-step procedure to run the simulation. Additionally, please let us know the specific device you are using.

Thank you for your support.