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saasha's avatar
saasha
Icon for New Contributor rankNew Contributor
1 month ago

FIR IP configured for Interpolation

Why does my Altera FIR IP, configured for interpolation by 80, produce the expected outputs when I provide 3 input samples, but fail to produce the expected behavior when I provide 10 input samples? ...
Compilation
Hdl
Simulation
JeffC_Altera's avatar
JeffC_Altera
Icon for Occasional Contributor rankOccasional Contributor
1 month ago

Just a thought - if you specify 6.25M input sample rate and a clock rate of 500M, you are specifying an oversample rate of 80x.  This implies that you should see an input sample 1 in every 80 clock cycles on the input (and then receive full rate data @ 500M on the output).  You are likely overflowing the FSM inside the IP.  With that said, I believe you should be seeing tready go low.  What version of Quartus / IP are you using here?