Forum Discussion

OrF's avatar
OrF
Icon for Occasional Contributor rankOccasional Contributor
2 years ago

Find where false_path was set.

Hi, I have a design where there is a physical path between two flip-flops (FF). However, when I try to generate a timing report, the Timing Analyzer shows “nothing to report.” I assume this might be...
Timing
OrF's avatar
OrF
Icon for Occasional Contributor rankOccasional Contributor
1 year ago

Hi,

I’ve attached the QAR file. I’m not sure what files are inside the QAR, but the timing constraints I would like to expand are as follows:

set_false_path -from [get_clocks {rx_*}] -to [get_clocks {pll_*}]
set_output_delay -add_delay -max -clock [get_clocks {tx_clk}] 47.000 [get_ports {DIE0_dib_pad_0_*_*[*]}]
set_output_delay -add_delay -min -clock [get_clocks {tx_clk}] 0.000 [get_ports {DIE0_dib_pad_0_*_*[*]}]

In my project, these constraints are located in the file scf_manual_addition.scf.

I’m not sure what the QAR will generate, but my expectation is that the * will be expanded in any of the three cases.

Thanks,
Or