Forum Discussion
David32
Occasional Contributor
2 years agoFatal Error in Platform Designer
Hi, I have created a hierarchical QSYS design. This loads into Platform Designer, saves and passes validation checks. However, when running "generate HDL" I am getting two errors: Error writing s...
David32
Occasional Contributor
2 years agoHi SyafieqS,
At present it is not blocking, but would very much appreciate an answer within 2 weeks.
Thanks
David