Forum Discussion

spte's avatar
spte
Icon for New Contributor rankNew Contributor
1 year ago
Solved

Failed to create DisplayPort IP Core Example Design under Windows

Dear Support Community, I am using Intel Quartus under MS Windows and I want to use the Intel DisplayPort IP Core for Cyclone V FPGA. As a start, I want to create the example design. To configure t...
Hdl
  • VenT_Altera's avatar
    VenT_Altera
    1 year ago

    Hi spte,


    Thank you for the updates. My apologies for the delayed response, I was out of the office.


    Yes, please upgrade the IP core when using the newer Quartus version after generating the design example in the older Quartus version (18.1). It should work properly.


    Please let me know if there are any issues with upgrading the IP cores in the design example.


    Thanks.

    Best Regards,

    Ven


spte's avatar
spte
Icon for New Contributor rankNew Contributor
1 year ago

Dear ventt

Thanks for investigating.

I'm one step further now: I had to go down to version Quartus 18.1 Lite. With this version, I could create the DP example design.

It seems, that the flow requires Cygwin to be installed. 18.1 was the last Quartus version using Cygwin.

Since this version (so also the core) is quite old, I now have several options:

  • Converting the the pre-compiled project up to a newer Quartus Version and updating the core
  • Find out how to use Cygwin to create the core with a recent Quartus version
  • Figure out what was the problem with using WSL with the recent version

Hope you bring a bit light into this.

Thanks in advance

spte