Forum Discussion
PAA
New Contributor
1 year agoError(21961): Input port OE of a "13_TRUE_DIFF_SIGNALING" I/O output buffer <path> is not supported
Hi, I am attempting to implement differential bi-directional IO on the HSIO bank with true differential voltage, using the GPIO Intel FPGA IP for Agilex 5 device A5ED065BB32AE6SR0. However, I ...
AqidAyman_Altera
Regular Contributor
1 year agoI’m glad that your question has been addressed, I now transition this thread to community support. If you have a new question, Please login to ‘https://supporttickets.intel.com/s/?language=en_US’, view details of the desire request, and post a feed/response within the next 15 days to allow me to continue to support you. After 15 days, this thread will be transitioned to community support. The community users will be able to help you on your follow-up questions.