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PAA's avatar
PAA
Icon for New Contributor rankNew Contributor
1 year ago

Error(21961): Input port OE of a "13_TRUE_DIFF_SIGNALING" I/O output buffer <path> is not supported

Hi, I am attempting to implement differential bi-directional IO on the HSIO bank with true differential voltage, using the GPIO Intel FPGA IP for Agilex 5 device A5ED065BB32AE6SR0. However, I ...
Hdl
FvM's avatar
FvM
Icon for Super Contributor rankSuper Contributor
1 year ago

I don't expect problems with 1.3 V supply and differential SSTL-12.