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Altera_Forum
Honored Contributor
Honored ContributorError
I have some problems when I try to compile mymux. This is my code: LIBRARY ieee ; USE ieee.std_logic_1164.all ; Entity mymux21 is port (A,B: in std_logic_vector (3 downto 0); S: in std_l...
Altera_ForumHonored Contributor
Honored ContributorThe problem could be the code. You are creating an architecture that instantiates itself, possibly creating an infinite loop. You should use different names for the std_logic and std_logic_vector versions of your mux.
