Forum Discussion
JPrig
Occasional Contributor
Occasional ContributorError while simulating Cyclone 10 GX PLL
Hi, I want to simulate a simple test project for Cyclone 10 GX. My tool is Aldec Riviera PRO. I instantiate a PLL (IOPLL Intel FPGA IP) and a FIFO in Quartus 24.3 PRO. In Quartus the project compil...
RichardT_altera
Super Contributor
Super ContributorI understand.
In that case, do you need any further assistance from my side?
Regards,
Richard Tan
JPrigOccasional Contributor
Occasional ContributorNo, thanks, you can close this thread.
Regards,
Julia
