Forum Discussion
RDoev1
New Contributor
6 years agoError when Importing HDL to Create Components in Platform Designer
The attached screenshots show errors received when trying to import HDL to create an AXI4Lite slave Generic Component in Platform Designer. Following the Intel Video for "Importing HDL to create Qsys...
SyafieqS
Super Contributor
6 years agoHi Roy,
From the error message there, the altera_axi4lite_slave interface must have clock and reset interface associated. I see "none" in the boxes. Simply click and select clock_sink and reset_sink for associated clock and associated reset respectively. Once you select, the parameter window automatically update it and then should be error free.
Thanks,
Regards