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AvramG's avatar
AvramG
Icon for New Contributor rankNew Contributor
4 years ago

Error: (vsim-3173) Entity '...' has no architecture.

Hi. I intend to work on Cyclone10 chip. I try to do a simulation on 1-port RAM IP in Questa. When I run my compile_async_player.do file with the following commands: vcom -stats=non...
ShengN_altera's avatar
ShengN_altera
Icon for Super Contributor rankSuper Contributor
3 years ago

Hi Avram,


I didn't change anything in your simulation_bad file. I just simulate it with questa starter edition and then I got different error as below:

Fatal: (vsim-3693) The minimum time resolution limit (1ps) in the Verilog source is smaller than the one chosen for SystemC or VHDL units in the design. Use the vsim -t option to specify the desired resolution.

Then, I replace msim_setup.tcl in simulation_bad file with the one in simulation_good file and everything finally work fine.


Best Regards

Sheng

p/s: If any answer from community or Intel support are helpful, please feel free to mark as solution and give Kudos.