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Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
18 years ago

Error: top level design entity " " is undefined

we have problem in compiling VHDL code in Quartus II software. Every time we compile it shows the Error:top level design entity " file name" is undefined. We are even taking care of the case se...
AMish34's avatar
AMish34
Icon for New Contributor rankNew Contributor
6 years ago

You should match ur filename with the name after module.

like if ur filename is section1. then in ur code there should be module section1 ().