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SparkyNZ
Contributor
1 year agoWell.. I implemented my frameBuffer as a separate module as suggested here: https://www.intel.com/content/www/us/en/docs/programmable/683082/22-1/simple-dual-port-dual-clock-synchronous-ram.html
..and that is compiling and "working" once again. Now I have this warning, so I assume all is OK and back to normal?
Warning (276027): Inferred dual-clock RAM node "FrameBuffer:frameBuffer|ram_rtl_0" from synchronous design logic. The read-during-write behavior of a dual-clock RAM is undefined and may not match the behavior of the original design.
- FvM1 year ago
Super Contributor
Hi,
good that it works. It's impossible to understand the problem without seeing the full code.
Regarding above warning, it depends on read/write sequence if it's an actual problem. Quartus can't see it. It just tells the fact that dual clock RAM can involve inconsistent read during write behaviour. If the same address is written and read simultaneously, the read data word may be a mixture of old and new data bits.- SparkyNZ1 year ago
Contributor
I am always happy to share full code but there's always the danger of losing IP when publicly shared. Thank you. I'll accept your answer as the solution since it has pointed me in the right direction and made me learn a bit more.